Smiths Interconnect offers wafer-level chip test probes
- ผู้เขียน:Ella Cai
- ปล่อยบน:2017-12-06
Smiths Interconnect has introduced a range of probe heads for wafer-level chip-scale package testing.
The probe heads in the Volta series are used for testing the chips while in their wafer form.
In the design spring probe contacts are used in place of cantilever and traditional vertical probe card technologies.
The am is to create a short signal path enabling low and stable contact resistance, high current carrying capacity and longer life cycle.
The supplier has used proprietary-engineered plastic and machined ceramic materials in the product design for improved planarity that allows increased test parallelism.
Jeff Dick, marketing vice president at Smiths Interconnect, writes:
“The technical challenges and increases in packaging costs are fuelling the growth of wafer-level packages and ‘known good dies’. These products address these trends with a cost-effective, high-performance option specifically designed to meet customers’ needs.”
The probe heads in the Volta series are used for testing the chips while in their wafer form.
In the design spring probe contacts are used in place of cantilever and traditional vertical probe card technologies.
The am is to create a short signal path enabling low and stable contact resistance, high current carrying capacity and longer life cycle.
The supplier has used proprietary-engineered plastic and machined ceramic materials in the product design for improved planarity that allows increased test parallelism.
Jeff Dick, marketing vice president at Smiths Interconnect, writes:
“The technical challenges and increases in packaging costs are fuelling the growth of wafer-level packages and ‘known good dies’. These products address these trends with a cost-effective, high-performance option specifically designed to meet customers’ needs.”
