Xilinx, ARM, Cadence and TSMC to build CCIX Chip
- Author:Ella Cai
- Release on:2017-09-12
Xilinx, Arm, Cadence Design Systems and TSMC are collaborating on a Cache Coherent Interconnect for Accelerators (CCIX) test chip in TSMC 7nm FinFET process technology for delivery in 2018.
The test chip aims to provide a silicon proof point to demonstrate the capabilities of CCIX in enabling multi-core high-performance Arm CPUs working via a coherent fabric to off-chip FPGA accelerators.
Accelerating applications in the data center is a growing requirement due to power and space constraints.
Applications such as big data analytics, search, machine learning, wireless 4G/5G, in-memory database processing, video analytics, and network processing benefit from acceleration engines that move data seamlessly among the various system components.
CCIX will allow components to access and process data irrespective of where it resides, without the need for complex programming environments.
The test chip aims to provide a silicon proof point to demonstrate the capabilities of CCIX in enabling multi-core high-performance Arm CPUs working via a coherent fabric to off-chip FPGA accelerators.
Accelerating applications in the data center is a growing requirement due to power and space constraints.
Applications such as big data analytics, search, machine learning, wireless 4G/5G, in-memory database processing, video analytics, and network processing benefit from acceleration engines that move data seamlessly among the various system components.
CCIX will allow components to access and process data irrespective of where it resides, without the need for complex programming environments.
