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Home > News > Company News > Moortec launches 7nm on-chip m.....

Moortec launches 7nm on-chip monitoring IP for SoC

  • Author:Ella Cai
  • Release on:2017-08-24
Moortec Semiconductor, the Plymouth-based IP  specialists for on-chip monitors and sensors, have brought out an embedded monitoring subsystem for TSMC’s 7nm FinFET (FF) process.

Within the subsystem the 7nm Temperature Sensor is a high precision low power junction temperature sensor that has been developed to be embedded into ASIC designs. It can be used for a number of different applications including Dynamic Voltage and Frequency Scaling (DVFS), device lifetime enhancement, device characterisation and thermal profiling.

In addition, the new 7nm Process Monitor provides the means for advanced node Integrated Circuit (IC) developers to detect the process variation of 7nm core digital MOS devices. The Process Monitor can be used to enable continuous DVFS optimisation systems, monitor manufacturing variability across chip, gate delay measurements, critical path analysis, critical voltage analysis and also monitor silicon ‘ageing’.

The subsystem also includes the sophisticated Process, Voltage and Temperature (PVT) Controller with AMBA APB interfacing, which supports multiple monitor instances, statistics gathering, a production test access port as well as other compelling features.

Moortec’s PVT monitoring IP is designed to optimise performance in today’s cutting-edge technologies, solving the problems that come about through scaling of devices. Applications include Datacentre & Enterprise, Automotive, Mobile, IoT, Consumer and Telecommunications.

In-chip monitoring has become a vital factor in the design and performance optimisation of small-geometry designs. Since 2010 Moortec have brought to market a highly featured embedded PVT sensing fabric for use in-chip within advanced node CMOS technologies from 40nm down to 7nm.

Alongside the IP offering, Moortec provide expertise on macro placement, production result analysis and support and guidance on how to implement DVFS/AVS optimisation schemes and reliability schemes. As a big growth area for advanced technology design, Moortec are able to help our customers understand more about architecting and implementing such schemes. Being the only PVT dedicated IP vendor, Moortec are considered a centre-point for such expertise.

“A key aspect to addressing giga-scale issues today is that optimisation can be applied to each and every device, either during production or when devices are ‘in-the-field’. Moortec believes that the strategies adopted by IC designers moving forward will be heavily influenced by the analysis of data harvested from in-chip monitors during the life time of every device,” says Stephen Crosher, CEO of Moortec.

“The industry is required to face challenges posed by Moore’s Law,” adds Crosher, “our technology gives confidence to the IC design community and the tools needed to view conditions in-chip, not just generally but per device and within regions of a device to optimise for power, speed or reliability, dependant on the customer application. Moortec plan to be at the forefront of this emerging and exciting sector of the semiconductor industry which is evolving at a rapid pace.”